PREDICTIVE MODELLING FOR POWER CONSUMPTION IN VLSI DESIGN USING MACHINE LEARNING

Abstract

This paper presents a comprehensive study on the application of machine learning techniques to predict power consumption in Very Large Scale Integration (VLSI) circuits. By leveraging historical design data, we develop and validate predictive models that assist designers in making power-efficient decisions early in the design process. Our results demonstrate significant improvements in prediction accuracy, offering promising directions for future VLSI design optimization.